\(A\) | \(B\) | \(Y\) |
0 0 1 1 |
0 1 0 1 |
1 0 1 0 |
1. |
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2. |
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3. |
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4. |
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1. | 2. | ||
3. | 4. |
1. | A | B | C | 2. | A | B | C |
0 | 0 | 0 | 0 | 0 | 0 | ||
0 | 1 | 1 | 0 | 1 | 1 | ||
1 | 0 | 0 | 1 | 0 | 1 | ||
1 | 1 | 1 | 1 | 1 | 0 | ||
3. | 0 | 0 | 1 | 4. | 0 | 0 | 1 |
0 | 1 | 0 | 0 | 1 | 0 | ||
1 | 0 | 0 | 1 | 0 | 1 | ||
1 | 1 | 1 | 1 | 1 | 0 |
The output of the logic circuit shown is equivalent to a/an:
1. \(\text{OR}\) gate
2. \(\text{NOR}\) gate
3. \(\text{AND}\) gate
4. \(\text{NAND}\) gate